1. Field of the Invention
The present invention relates to a silicon single crystal wafer used for manufacturing semiconductor devices. The wafer is preferably formed from a silicon single crystal that has been pulled by the Czochralski method (hereinafter referred to as the CZ method). Pulling is defined herein as forming a silicon single crystal rod. Such rods are used as the raw material of the wafers.
2. Prior Art
The silicon single crystal wafer used in semiconductor elements is manufactured mainly by the CZ method. The CZ method for pulling a cylindrical silicon single crystal involves dipping a seed crystal into molten liquid silicon in a quartz crucible, and then pulling up the seed crystal, while rotating the crucible and crystal. The silicon single crystal rod can be pulled at high (0.8-2.0 mm/min), medium (0.5-0.8 mm/min) or low (less than 0.5 mm/min) pulling speeds in the conventional CZ method. Most silicon single crystals are pulled at high pull-up speeds.
The silicon single crystal pulled by the CZ method as hereinabove described is prone to oxidation-induced stacking faults (OSF) that form a ring in the wafer made from the crystal under thermal oxidation process (for example, 1000-1200.degree. C..times.1-10 hr). It is known that the ring formed by OSF shifts toward the periphery of the single crystal as the pulling speed is increased. At present, high velocity pulling rate wafers are used to manufacture LSI. These wafers are formed from silicon single crystal that has been pulled at a relatively high pulling speed (1.0-2.0 mm/min) to shift the OSF ring to the outermost periphery of the single crystal.
There exist several types of minute defects (called grown-in defects) in silicon single crystal pulled at such high pulling rate, that deteriorate the gate oxide integrity (GOI) of MOS devices. Moreover, such grown-in defects are thermally stable, and remain in the active region near the wafer surface, where they deteriorate not only the GOI but also the junction leakage characteristic (e.g. M. Horikawa et al., Semiconductor Silicon, 1994. p 987 the contents of which are hereby incorporated by reference).
The increasing level of integration of MOS semiconductor elements like LSI has generated demand for thinner gate oxide films resulting in a shallower diffusion layer of the source-drain. Thinner gate oxide films require an enhanced GOI of gate oxide film and a reduction of the junction leakage current. The high pulling rate wafers presently being used for LSIs are inferior in these critical properties, making it difficult to develop highly integrated MOS semiconductors.
Recently, a method of pulling single crystals at medium or low pulling rates of 0.8 mm/min or less, was proposed in Provisional Patent Publication No. Hei 2-267195. Silicon single crystal wafers raised at these pulling rates also suffer from poor quality.
Generally, the temperature distribution inside the single crystal depends on the hot zone structure of the CZ furnace. This distribution does not undergo much change, even though the pulling rate can vary. Because the temperature distribution remains constant, there are predictable relationships between the pulling rate and the defect developing regions as shown in FIG. 1. The pulling rates needed to produce these defects developing regions may vary from one CZ furnace to another, but these regions are always present.
For medium velocity pulling (pulling rate=0.6-0.8 mm/min), an OSF ring develops at about one half the distance from the center of the silicon single crystal wafer. The wafer on each side of the ring has different properties. The gate oxide film in the region outside the OSF ring has good GOI, while inside the ring the GOI is poor due to several types of grown-in defects.
The types of defects include infrared scattering defects formed while pulling the crystal. Observed by infrared tomography, this type of defect has a measured density of approximately 10.sup.6 spots/cm.sup.3. This fault is believed to be a kind of oxygen precipitate and has enough thermal stability to remain in the device active region even after the heat treatment process, causing deterioration of the wafer's junction leakage characteristics.
The width of the OSF ring usually ranges from 3-10 mm, and has about 10.sup.4 spots/cm.sup.2, enough to degrade the junction leakage characteristics of semiconductor elements. When the OSF ring is heat treated, oxygen precipitates develop at a density of 10.sup.8 -10.sup.9 spots/cm.sup.3. The thermally stable oxygen precipitates actually grow larger under a 1250.degree. C. heat treatment. Accordingly, heat treatments worsen the semiconductor properties of the OSF ring.
When the pulling rate of the silicon single crystal is decreased to 0.5-0.6 mm/min, as shown in FIG. 1(B), the diameter of the OSF ring shrinks toward the center of the wafer. With the area outside the ring enlarged, the GOI is improved, but now dislocation clusters appear at the peripheral region of the wafer. This ring of dislocation clusters is roughly 10-20 .mu.m size and contains 10.sup.3 spots/cm.sup.3. It is well-known that dislocation clusters also cause degradation of the characteristics of semiconductor elements.
Silicon single crystals pulled by conventional CZ methods contain a 1-2.times.10.sup.18 atoms/cm.sup.3 concentration of oxygen impurities. Oxygen contamination is caused by oxygen deposition during the heat treatment step (for example, 600-1150.degree. C. for 10-70 hr) in the device processing. The oxygen precipitates act as a site for gettering heavy metal contaminants during the device processing and cause degradation of the device characteristics.
Greater oxygen precipitates inside the OSF ring increases the gettering capacity (called IG capacity), while outside the OSF ring, where dislocation clusters are produced, oxygen precipitates hardly takes place, and IG capacity is low.
For crystals pulled at a medium velocity of 0.5-0.8 mm/min pull-up speed, an OSF ring is formed. The high density of defects that develop both within and around the ring make wafers made from these crystals unsuitable for manufacturing highly integrated semiconductor elements.
In contrast, wafers pulled at a low velocity with a pulling rate of 0.5 mm/min or less, as shown in FIG. 1C do not form the OSF ring, nor the infrared scattering defects that occur inside this ring. However, dislocation clusters develop all over the wafer. Dislocation clusters give rise to lowered device characteristics and increased IG capacity as was hereinabove described. Thus, low pulling rate wafers are also not suitable for manufacturing highly integrated semiconductor elements.
Silicon single crystals pulling by conventional CZ methods develop deleterious defects at high, medium and low pull-up speeds. Thus it appeared impossible to produce wafers suitable for manufacturing highly integrated semiconductor elements using this method.